Dump after coldstart.

Contents of TDA10021 (2005-01-08 15:37:27)

TDA10021 identification correct for TDA10021 revision 1 ($7C)

Register $00 == $4B (Configuration register)
Register $01 == $6A (AGC reference)
Register $02 == $04 (AGC configuration 1 register)
Register $03 == $12 (Clock configuration regsiter)
Register $04 == $02 (Carrier configuration register)
Register $05 == $46 (Carrier lock threshold)
Register $06 == $27 (Equalizer configuration 1 register)
Register $07 == $1A (Equalizer step register)
Register $08 == $43 (Threshold value to switch equalizer algorithm)
Register $09 == $6A (Reference parameter for the acquisition phase)
Register $0A == $66 (Baud rate (low))
Register $0B == $FB (Baud rate (middle))
Register $0C == $1E (Baud rate (high))
Register $0D == $84 (Baud rate inverse)
Register $0E == $02 (Gain register)
Register $0F == $40 (Test register)
Register $10 == $78 (Read Solomon configuration register)
Register $11 == $00 (Synchronization register)
Register $12 == $A0 (Polarity 1 register)
Register $13 == $7F (Uncorrectable packet counter)
Register $14 == $A8 (Bit error rate (low))
Register $15 == $42 (Bit error rate (middle))
Register $16 == $00 (Bit error rate (high))
Register $17 == $FF (Value of the tuner AGC)
Register $18 == $8E (Mean square error)
Register $19 == $00 (Frequency offset)
Register $1A == $7C (Identity number)
Register $1B == $00 (ADC register)
Register $1C == $10 (Equalizer configuration 2 register)
Register $1D == $FF (Symbol clock frequency offset)
Register $1E == $00 (Reserved 1)
Register $1F == $00 (Reserved 2)
Register $20 == $12 (Parallel interface register)
Register $21 == $00 (Number of saturations of the Nyquist filter)
Register $22 == $00 (ADC saturations)
Register $23 == $00 (Mid-range ADC saturations)
Register $24 == $00 (Number of saturations of the first decimation filter)
Register $25 == $00 (Number of saturations of the second decimation filter)
Register $26 == $00 (Number of saturations of the third decimation filter)
Register $27 == $00 (Number of saturations of the anti-aliasing filter)
Register $28 == $00 (M multiplying factor)
Register $29 == $00 (N multiplying factor)
Register $2A == $10 (PLL register)
Register $2B == $50 (Serial interface register)
Register $2C == $0F (Control register)
Register $2D == $06 (Sweep register)
Register $2E == $00 (AGC configuration 2 register)
Register $2F == $FF (Value of the IF AGC)
Register $30 == $00 (Saturation threshold value for the ADC)
Register $31 == $00 (Mid saturation threshold value for the ADC)
Register $32 == $80 (Interrupt selection/enable)
Register $33 == $00 (Interrupt status)
Register $34 == $00 (PWM reference)
Register $35 == $FF (Tuner AGC max threshold)
Register $36 == $00 (Tuner AGC min threshold)
Register $37 == $00 (Input frequency offset 1)
Register $38 == $00 (Input frequency offset 2)
Register $39 == $00 (Real part of the constellation)
Register $3A == $00 (Imaginary part of the constellation)
Register $3B == $FF (IF AGC max threshold)
Register $3C == $00 (IF AGC min threshold)
